Instructor: Prof. A. Veidenbaum
Office Hours: immediately after each lecture or by appointment
Textbook: Microprocessor Architecture
Jean-Loup Baer
Prerequisites: CompSci152 or equivalent. CompSci143 is recommended
Major Topics:
1. Impact of technology, ISA on architecture
2. Processor performance
3. Brief review of pipelining
4. Basic memory hierarchy
5. ILP and superscalar processors
6. Dynamic Instruction Scheduling and Out-of-order execution
7. Advanced Memory Hierarchy
8. Vector, multi-threaded, and multiprocessor systems
Workload:
1. 3 homeworks
2. final
Grading:
class participation - 15%
quizes - 15%
homework - 5% (1/2/2)
final or project - 65%
Graded on a curve
Class material will be available on the course Web page:
http://www.ics.uci.edu/~alexv/250A